Error-rate prediction for programmable circuits: methodology, tools and studied cases

by Raoul Velazco (Presenter)
Laboratoire TIMA, University Grenoble Alpes, France

Abstract – The miniaturization issued from advances in manufacturing technologies, leads to an increase of the sensitivity of integrated circuits and systems to the effects of radiation. Among these effects, gathered under the acronym SEE (Single Event Effects), the so-called SEU (Single Event Upsets) is the change of the content of one or many bits as the consequence of the impact of an energetic particle (heavy ion, proton, neutron,…) present in the environment where the circuits operates. This conjuncture in the past concerned only applications devoted to operate in space environment, where particles of high energy (cosmic rays) are present. Nowadays SEEs must be considered even for applications operating at ground level. Evaluating the sensitivity to the effects of radiation of programmable digital integrated circuits (i.e. microprocessors, digital signal processors and field programmable gate arrays) requires specific methodologies and dedicated tools. Indeed, such an evaluation is based on data gathered from tests performed on-line during which the target circuit is exposed to a flux of particles having features (energy, range in Silicon) somewhat representative of the ones the circuit will encounter in its final environment. These experiments, usually called accelerated radiation ground testing, are performed by means of appropriate radiation facilities entailing thus significant development efforts and cost impact. In the presentation an approach will be presented, describing the corresponding hardware and software tools developed to deal with such experiments at a reasonable cost versus effort trade-off. An approach to predict the SEU error-rate for complex circuits based on combining faultinjection and radiation test will be presented and illustrated by results obtained for representative circuits.

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Raoul Velazco

Dr. Raoul VELAZCO was born in Montevideo (Uruguay) in 1952. Living in France since 1976, he got there the PhD and the Doctor ès Sciences in Computer Sciences in 1982 and 1990 respectively, both from INPG (Institut National Polytechnique de Grenoble). Since 1984 he is a researcher at CNRS (French Research Agency), being presently Director of Researches. Since 1996 he works at TIMA Labs. (Grenoble) where he leads RIS (Reliable Integrated circuits and Systems) research group. His researches concern the methodology to assess the sensitivity to the effects of radiation of integrated circuits and systems, the potential solutions to deal with these effects, the related tests in particle accelerator facilities and experiments at high altitude (mountains, planes, scientific satellites). Dr. Velazco was general chair of two important events related with these topics: IEEE RADECS (RADiation and its Effects in Circuits and Systems) in 2001 and Single Event Effects Symposium in 2009. He was the Technical Chair of RADECS 2012 held September 2012 in Biarritz (France). He is also the creator and general co-chair of the international school SERESSA (School on the Effects of Radiation on Embedded Circuits for Space Applications), whose 2022 edition was held GENEVA (Switzerland) organized in cooperation with CERN.

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