SETs in digital circuits and hardening techniques at design level
by Ygor Aguiar (Presenter)
CERN, European Organization for Nuclear Research, Switzerland
Abstract – The talk introduces the mechanism leading to SEE in digital circuits, focusing on SET and design-level techniques for hardening digital circuits against transient errors.
Ygor Aguiar
Ygor Aguiar received a B.Sc. degree in Automation Engineering from the Universidade Federal do Rio Grande, in 2015, a M.Sc. in Microelectronics from the Universidade Federal do Rio Grande do Sul, in 2017, and a Ph.D. degree in Electronics from the Université de Montpellier, in 2020. Currently, he is an associate scientist at CERN. His main research topics include the analysis and modeling of radiation effects in electronics, hardening techniques and radiation hardness assurance.
